首页|嵌入式系统|显示技术|模拟IC/电源|元件与制造|其他IC/制程|消费类电子|无线/通信|汽车电子|工业控制|医疗电子|测试测量
首页 > 分享下载 > 消费类电子 > (資料提供)如何降低同步轉換噪聲

(資料提供)如何降低同步轉換噪聲

资料介绍
如何降低同步轉換噪聲How to Reduce the Simultaneous Switching Noise
From the former lecture notes- Introduction of Simultaneous Switching Noise and The Effect of Loading Conditions on Simultaneous Switching Noise , we can know that if the NMOS transistor stayed in saturation through the transition of the input, the maximum simultaneous switching noise can be obtained as: VKtr é 4VDDnLK ù (1) Vnman = VK + ê1 1 + 2VDDnLK tr where VK = VDD VT . Now we want to study the factors that influent the magnitude of simultaneous Fig. 1. Maximum SSN versus number of drivers at C L = 15 pF
3 2 .5 Maximum SSN (V) 2 1 .5 1 0 .5 0 0 20 40 60 80 100 N u m b e r o f s w i tc h in g d r iv e r s

Fig. 2. Maximum SSN versus LVSS at C L = 15 pF and n = 4
3 Maximum SSN (V) 2.5 2 1.5 1 0.5 0 0 50 Lvss (nH ) 100 150

switching noi
标签:如何降低同步轉換噪聲
(資料提供)如何降低同步轉換噪聲
本地下载

评论